Intel Foundry today hosted its highly anticipated Foundry Direct Connect 2025 event, bringing together over 1,000 customers and ecosystem partners to detail significant advancements in its process technology roadmap, advanced packaging capabilities, and burgeoning ecosystem collaborations. The event served as a pivotal moment for Intel as it strives to solidify its position as a leading global foundry, emphasizing a customer-centric approach and technological innovation.
A key highlight of the event was the detailed progress on Intel’s next-generation process nodes, particularly the Intel 14A and Intel 18A technologies. Following the 18A node, Intel announced that it is actively engaging with lead customers on the Intel 14A process, distributing early versions of the Process Design Kit (PDK). Several customers have already expressed their intent to build test chips on this advanced node. Intel 14A will introduce PowerDirect, a cutting-edge direct contact power delivery technology, building upon the PowerVia backside power delivery featured in Intel 18A. This evolution promises enhanced power efficiency and performance for future chip designs. Notably, Intel aims for its 14A process to be the industry’s first to utilize High-NA EUV lithography, potentially offering a significant competitive edge. Early projections indicate a 15-20% performance-per-watt improvement and a 30% density increase over the 18A node. The 14A node will also feature “Turbo Cells,” a technology designed to boost CPU maximum frequency and GPU critical paths by allowing designers to optimize the mix of performance and power-efficient cells within a design block. Risk production for Intel 14A is slated for 2027.
The Intel 18A process, featuring the innovative RibbonFET gate-all-around transistors and PowerVia backside power delivery, is now in the risk production phase and is expected to reach high-volume manufacturing later this year. Intel also unveiled two new variants of the 18A node:
- Intel 18A-P: This variant is designed to deliver enhanced performance and is rule-compatible with the original 18A, ensuring a smoother transition for customers. Early wafers based on 18A-P are already in fabrication.
- Intel 18A-PT: This variant builds upon the performance and power efficiency advancements of 18A-P and incorporates Foveros Direct 3D hybrid bonding technology with an interconnect pitch of less than 5 micrometers. This enables the vertical stacking of dies, offering significant potential for high-performance computing and AI applications by increasing interconnect density and reducing latency.
Intel also highlighted the progress of its mature nodes, with the first production tape-out of its 16nm process now in the fabrication stage. Furthermore, the company is actively engaging with lead customers on its 12nm node and related derivatives, which are being developed in collaboration with UMC.
On the advanced packaging front, Intel detailed its comprehensive suite of solutions, including the integration of Intel 14A on Intel 18A-PT using Foveros Direct (3D stacking) and Embedded Multi-die Interconnect Bridge (EMIB) for 2.5D bridging. New additions to their packaging portfolio include EMIB-T, designed to support future high-bandwidth memory (HBM) needs, and two new Foveros architecture options: Foveros-R and Foveros-B, offering increased flexibility and efficiency for customer designs. To further enhance customer options, Intel announced a collaboration with Amkor Technology to broaden the availability of advanced packaging solutions.
A significant emphasis was placed on the development of a robust ecosystem. Intel announced the expansion of its Intel Foundry Accelerator Alliance with two new programs:
- Intel Foundry Chiplet Alliance: This alliance will focus on establishing a secure and scalable pathway for customers to deploy designs leveraging interoperable and secure chiplet solutions for various applications and markets, including government uses.
- Value Chain Alliance: This program aims to foster collaboration across the supply chain to ensure a seamless and efficient manufacturing process for foundry customers.
These new alliances complement the existing IP Alliance, EDA Alliance, Design Services Alliance, Cloud Alliance, and USMAG Alliance, providing a comprehensive suite of tools, intellectual property, and services to support customer designs.
In terms of manufacturing progress, Intel announced a significant milestone with its Fab 52 in Arizona successfully processing its first lot of wafers, marking a crucial step in domestic Intel 18A wafer manufacturing. While Oregon facilities will initially lead volume production, the Arizona fab is expected to increase its output. Intel reaffirmed its commitment to U.S.-based research, development, and wafer production for both Intel 18A and Intel 14A.
Keynote speakers at the event, including Intel CEO Lip-Bu Tan, Chief Technology and Operations Officer Naga Chandrasekaran, and General Manager of Foundry Services Kevin O’Buckley, underscored Intel’s dedication to building a world-class foundry by focusing on customer needs, fostering strong ecosystem partnerships, and driving technological leadership. The announcements at Foundry Direct Connect 2025 signal a significant step forward in Intel’s journey to becoming a major player in the foundry landscape, offering advanced process technologies and packaging solutions essential for the future of computing, especially in high-growth areas like artificial intelligence.
